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Study of a Parity Check Based Fault-Detection Countermeasure for the AES Key Schedule
side-channel analysis fault attacks parity check countermeasure
2015/12/23
In this paper we study a parity check based countermeasure proposed by Chen
et al. that thwarts their attack by detecting byte fault injection during the AES key schedule
process.
Cyclic and Quasi-Cyclic LDPC Codes on Row and Column Constrained Parity-Check Matrices and Their Trapping Sets
Quasi-Cyclic LDPC Codes on Row Column Constrained Parity-Check Matrices Their Trapping Sets
2011/2/21
This paper is concerned with construction and structural analysis of both cyclic and quasi-cyclic codes, particularly LDPC codes. It consists of three parts. The first part shows that a cyclic code gi...
Simplified LLRs for the Decoding of Single Parity Check Turbo Product Codes Transmitted Using 16QAM
LLRs Decoding of Single Parity Turbo Product Codes 16QAM
2009/9/4
Iterative soft-decision decoding algorithms require channel log-likelihood ratios (LLRs) which, when using 16QAM modulation, require intensive computations to be obtained. Therefore, we derive four si...