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Ultra-Thin Memory Storage Device Paves Way For More Powerful Computing(图)
Ultra-Thin Memory Storage Device Paves More Powerful Computing
2018/2/1
Engineers worldwide have been developing alternative ways to provide greater memory storage capacity on even smaller computer chips. Previous research into two-dimensional atomic sheets for memory sto...
Spray-on memory could enable bendable digital storage
Spray-on memory bendable digital storage
2017/4/27
USB flash drives are already common accessories in offices and college campuses. But thanks to the rise in printable electronics, digital storage devices like these may soon be everywhere – including ...
Much research has been devoted to studies of and algorithms for memory management based on garbage collection or explicit allocation and deallocation. An alternative approach, region-based memory mana...
Context- and Path-Sensitive Memory Leak Detection
Program analysis error detection memory management memory leaks boolean satisfiability
2016/5/24
We present a context- and path-sensitive algorithm for detecting memory leaks in programs with explicit memory management. Our leak detection algorithm is based on an underlying escape analysis: any a...
Compilation for Explicitly Managed Memory Hierarchies
Software-managed memory hierarchy bulk operations
2016/5/24
We present a compiler for machines with an explicitly managed memory hierarchy and suggest that a primary role of any compiler for such architectures is to manipulate and schedule a hierarchy of bulk ...
A Portable Runtime Interface For Multi-Level Memory Hierarchies
Memory Hierarchies Parallelism Runtime Sequoia
2016/5/24
We present a platform independent runtime interface for moving data and computation through parallel machines with multi-level memory hierarchies. We show that this interface can be used as a compiler...
Symbolic Heap Abstraction with Demand-Driven Axiomatization of Memory Invariants
Heap Analysis Relational Static Analysis Array Analysis Memory Invariants
2016/5/24
Many relational static analysis techniques for precise reasoning about heap contents perform an explicit case analysis of all possible heaps that can arise. We argue that such precise relational reaso...
M3: High-Performance Memory Management from Off-the-Shelf Components
Memory Management Garbage Collection Tracing Mark-Sweep Reference Counting
2016/5/24
Real-world garbage collectors in managed languages are complex.We investigate whether this complexity is really necessary and show that by having a different (but wider) interface between the collecto...
Realm: An Event-Based Low-Level Runtime for Distributed Memory Architectures
Realm Legion distributed memory deferred execution events reservations heterogeneous architectures runtime
2016/5/24
We present Realm, an event-based runtime system for heterogeneous,distributed memory machines. Realm is fully asynchronous: all runtime actions are non-blocking. Realm supports spawning computations, ...
Memory-built-in quantum cloning in a hybrid solid-state spin register
Memory-built-in quantum cloning hybrid solid-state spin register
2016/1/22
As a way to circumvent the quantum no-cloning theorem, approximate quantum cloning protocols have received wide attention with remarkable applications. Copying of quantum states to memory qubits provi...
NIST,UC Davis Scientists Float New Approach to Creating Computer Memory
NIST UC Davis Scientists Creating Computer Memory
2015/10/13
What can skyrmions do for you? These ghostly quantum rings, heretofore glimpsed only under extreme laboratory conditions, just might be the basis for a new type of computer memory that never loses its...
A computer memory with defects is modeled as a discrete memoryless channel with states that are statistically determined. The storage capacity is found when complete defect information is given to the...
Heterogeneous Graphene Nanoribbon-CMOS Multi-State Volatile Random Access Memory Fabric
Graphene GNTRAM heterogeneous memory multistate memory graphene nanoribbons
2014/12/8
CMOS SRAM area scaling is slowing down due to several challenges faced by transistors at nanoscale such as increased leakage. This calls for new concepts and technologies to overcome CMOS scaling limi...
快闪存储器(Flash Memory)IP核开发
IP核 快闪存储器 开发
2008/11/18
该项目主要研究内容为嵌入式Flash Memory IP软/硬核及其生成器技术。该项目已完成,现正在采用该技术设计开发军用密码ASIC电路,规模为7万门,内嵌 2K Flash Memory。技术完全成熟后,准备开发内含8K-64K的DSP、CPU及其他ASIC电路。该项目已获得了部分成果,有适合嵌入式0.5um Flash Cell结构设计、工艺流程、IP硬核与 Verilog描述,电泵电路设计...